Envoy Data

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Specs of SLC without the cost...

EconoSLC PrimerNeed SLC performance, endurance, data retention or BER in your application? EconoSLC™ delivers SLC features without SLC cost, SLC density limitations and SLC lead time. Below is an introduction to Envoy Data Memory’s EconoSLC™ technology.


The purpose of this page is to address the use of MLC NAND flash in memory applications that require, and benefit from, the performance characteristics of SLC NAND flash. Before delving into the benefits of EconoSLC™, or SLC Mode Programming, we must understand the limitations of MLC NAND flash, or Multi Level Cell NAND and the typical specifications that result.

Flash Memory Basics

NAND Cell4It is important to understand what makes up a flash cell before explaining the variation between SLC and MLC flash. Each cell consists of a single transistor, with an additional “floating” gate that can store electrons. Figure 1 shows the architecture of a NAND flash cell.

A large voltage difference between the drain and the source, Vd – Vs, creates a large electric field between the drain and the source. The electric field converts the previously nonconductive poly-Si material to a conductive channel, which allows electrons to flow between the source to the drain. The electric field caused by a large gate voltage, Vg, is used to bump electrons up from the channel onto the floating gate. As an electron travels closer to the drain, it gains more momentum and thus, more energy. But, this amount of energy is not enough to push an electron onto the floating gate. Electrons with high momentum near the drain can sometimes bump into Si (Silicon) atoms. This bump gives the electron enough energy to be pushed onto the floating gate. The number of electrons on the floating gate affects the threshold voltage of the cell Vt. This effect is measured to determine the state of the cell.

Single-Level Cell (SLC) flash

fundamentals4As the name suggests, SLC flash stores one bit value per cell, which basically is a voltage level. The bit value is interpreted as a “0” or a “1”. Since there are only two states, it represents only one bit value, and each bit can have a value of “programmed” or “erased.” Figure 2: Voltage Reference for SLC as compared to Voltage Reference for MLC. The white space represents the margin for error.

A “0” or “1” is determined by the threshold voltage Vt of the cell. The threshold voltage can be manipulated by the amount of charge put on the floating gate of the flash cell. Placing charge on the floating gate will increase the threshold voltage of the cell. When the threshold voltage is high enough, around 4.0V, the cell will be read as programmed. No charge, or threshold voltage < 4.0V, will cause the cell to be sensed as erased. SLC flash is used in commercial and industrial applications that require high performance and long-term reliability.

Multi-Level Cell (MLC) flash

As the name suggests, there are multiple values that an MLC cell can represent. The values can be interpreted as four distinct states: 00, 01, 10, or 11. These four states yield two bits of information. As seen in figure 1, a flash cell’s ability to store charge is why MLC technology works. Since the delta between each level has decreased, the sensitivity between each level increased. Thus, more rigidly controlled programming is needed to manipulate a more precise amount of charge stored on the floating gate. In order for a flash cell to be considered MLC technology, the cell must exhibit two characteristics:

1. Precise charge placement

2. Precise charge sensing

Thus, MLC flash works the same way as SLC flash. The threshold voltage Vt, is used to manipulate the state of the flash. Once again, the amount of charge on the floating gate is what determines the threshold voltage. As seen in figure 2, current MLC technology uses two bits, or 4 levels. However, it is possible to hold more bits. Equation 1 is a generic equation to follow to determine how many states are needed for the desired bits.

Equation 1 States = 2N

N is equal to the number of desired bits per cell. For example, for a cell to hold three bits, you need eight states equal to: 000, 001, 010, 011, 100, 101, 110, 111.  MLC flash is used in consumer applications that do not require long term reliability such as consumer grade USB flash drives, SSDs, SD Cards, µSD Cards, portable media players, and Compact flash cards.

SLC and MLC Compared

Now that the differences between SLC and MLC have been explained, let’s compare their specifications to help further make a distinction between the two grades. Using the same wafer size, you can double the density of the MLC flash by using the charge placement technology. Thus, MLC has greater densities. The read speeds between SLC and MLC are comparable. Reading the level of the flash cell compares the threshold voltage using a voltage comparator. Thus, the architecture change does not affect sensing. In general, the read speeds of flash are determined by which controller is used. The endurance of SLC flash is 10X more than MLC flash. The endurance of MLC flash decreases due to enhanced degradation of Si that has detrimental effects on noise margins not seen in SLC. This is a main reason why SLC flash is considered industrial grade flash and MLC flash is considered consumer grade flash. Higher temperatures cause more leakage in the cells also effecting the Vt level sensing. Combined with the increased sensitivity required to differentiate between the levels, this leakage will cause the sensors to read the wrong level. As a result, the operating temperature of MLC spans only the commercial range. Leakage is not significant in SLC flash and thus, it can operate in an industrial temperature range unless special industrial temperature (-40ºC ~ 85ºC) MLC is used.

EconoSLC™ or “SLC Mode MLC” NAND

The use of MLC in SLC Mode to provide SLC benefits is widely accepted, documented and productized to the mass market by some of the largest semiconductor suppliers globally. These products are based on a single die that can be reconfigured to have varying amounts of MLC and SLC NAND.  The target applications for these products require dynamic resizing of the SLC partition and MLC partition, and the associated logic to properly predict the ratios of SLC to MLC on the same die. One example of this technology is Samsung Electronics Co fusion flash: “Samsung’s Flex-OneNANDTM is a proprietary memory device that provides both SLC and MLC NAND in a single cost-efficient chip. It has been designed for applications that require high speed and high reliability in processing both code and data content.”¹.

For the purpose of this paper, the use of an MLC NAND flash device will be exclusively used in SLC Mode. Our prescribed method is to use an MLC flash device that is 2X the density of the desired SLC produce and commit the entire address space to SLC mode programming, thus cutting the density by half. This solution is advantageous for both economic reasons and availability reasons.

LSB page and MSB page programming in MLC

To further explore the structure and programming of an MLC NAND flash, please see Figure 3 below. For two-bit MLC, one cell retains two bits for two paired pages, the least-significant-bit (LSB) page and the most-significant-bit

NANDCELL2(MSB) page. Fig. 3 shows the conceptual structure of a MLC flash block and how the value of a bit is determined by the threshold voltage. Two paired pages, LSB page and MSB page, share the memory cells that belong to the same word line. Each page only uses its own bit position of a bit pattern stored in a cell and each cell can be programmed twice.²  LSB is inherently faster and often referred to as fast page programming, or SLC programming Mode. MSB is slower due to the more precise charge level placement required and results in MLC write performance of about half that of SLC and the available program/erase (P/E) cycles of MLC is about one fifth that of SLC³.


In the case of PATA controller (CF) and SATA controller (CFast), the write performance has been tremendously improved, and the read performance with ultra MLC is also comparable to that with MLC when using PATA controller. In the case of the MicroSD, the write performance was almost doubled, with identical read performance.

For CFast, the read performance decreases with SLC mode MLC because each flash has two buffers inside and while the controller reads out the data from Buffer 1, the next piece of data could be “preloaded” to Buffer 2. Similarly, while the controller reads out the data from Buffer 2, the next piece of data will be “preloaded” to Buffer 1. Such an operation is also known as “cache-read”. However, fast and slow pages within MLC are not arranged in an orderly fashion, so with SLC mode MLC, cache-read will be disabled, resulting a decrease in the read performance.


Below please find endurance measurements comparing MLC NAND with EconoSLC and with SLC NAND.




EconoSLC™ or SLC Mode MLC architecture can increase both performance and lifespan of MLC flash memory compared to the use of NAND in MLC-only Mode. Since the MLC NAND used in SLC Mode approximates the specifications of SLC NAND, it is considered a viable option for engineers seeking the benefits of SLC, without the economic penalty, density limitations or the supply shortage issues.


[1] Samsung Electronics. Samsung Brings 40-nm Technology to Production of Advanced Fusion Memory – Flex-OneNAND™.

[2] Soojun Im, Dongkun Shin, ComboFTL: Improving performance and lifespan of MLC flash memory using SLC flash buffer, Journal of Systems Architecture, Volume 56, Issue 12, December 2010, Pages 641-653, ISSN 1383-7621, 10.1016/j.sysarc.2010.09.005.  Keywords: flash memory; Multi-level cell; flash translation layer; Embedded storage

[3] S. Lee, K. Ha, K. Zhang, J. Kim, J. Kim, FlexFS: a flexible industrial flash USB file system for MLC. NAND flash memory, in: Proc. of USENIX Technical Conf., 2009.

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